diff --git a/sys/conf/kern.post.mk b/sys/conf/kern.post.mk index 789f2e70790..cf7d9a96c92 100644 --- a/sys/conf/kern.post.mk +++ b/sys/conf/kern.post.mk @@ -193,7 +193,7 @@ ${FULLKERNEL}: ${SYSTEM_DEP} vers.o .if ${MK_CTF} != "no" @echo ${CTFMERGE} ${CTFFLAGS} -o ${.TARGET} ... # @${CTFMERGE} ${CTFFLAGS} -o ${.TARGET} ${SYSTEM_OBJS} vers.o - @echo "${SYSTEM_OBJS} vers.o" | xargs -n 50 ${CTFMERGE} -v ${CTFFLAGS} -o ${.TARGET} -w ${.TARGET} + @echo "${SYSTEM_OBJS} vers.o" | xargs -t -n 50 ${CTFMERGE} -v ${CTFFLAGS} -o ${.TARGET} -w ${.TARGET} .endif .if !defined(DEBUG) ${OBJCOPY} --strip-debug ${.TARGET} diff --git a/sys/conf/ldscript.powerpc64 b/sys/conf/ldscript.powerpc64 index 63f93259ae0..5b455e02e67 100644 --- a/sys/conf/ldscript.powerpc64 +++ b/sys/conf/ldscript.powerpc64 @@ -15,8 +15,10 @@ SECTIONS { /* Low-address wrapper for bootloaders (kexec/kboot) that can't parse ELF */ +/* . = kernbase - 0x100; .kboot : { *(.text.kboot) } :text +*/ /* Read-only sections, merged into text segment: */ . = kernbase; diff --git a/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h b/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h index ec0a03a877a..e7c0c131fda 100644 --- a/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h +++ b/sys/contrib/ncsw/inc/Peripherals/dpaa_ext.h @@ -57,8 +57,12 @@ #include +#ifndef __BYTE_ORDER__ #define __BYTE_ORDER__ BYTE_ORDER +#endif +#ifndef __ORDER_BIG_ENDIAN__ #define __ORDER_BIG_ENDIAN__ BIG_ENDIAN +#endif /**************************************************************************//** @Description Frame descriptor diff --git a/sys/powerpc/booke/locore.S b/sys/powerpc/booke/locore.S index 32a217e4e4f..5e989a5e4b8 100644 --- a/sys/powerpc/booke/locore.S +++ b/sys/powerpc/booke/locore.S @@ -39,7 +39,7 @@ #include #include -#define TMPSTACKSZ 16384 +#define TMPSTACKSZ 32768 #ifdef __powerpc64__ #define GET_TOCBASE(r) \ @@ -76,6 +76,14 @@ #define WORD_SIZE 4 #endif +#ifdef __powerpc64__ + /* Placate lld by creating a kboot stub. */ + .section ".text.kboot", "x", @progbits + b __start +#endif + + + .text .globl btext btext: @@ -378,15 +386,28 @@ done_mapping: .globl __boot_page .align 12 __boot_page: - bl 1f - + /* + * The boot page is a special page of memory used during AP bringup. + * It gets *temporarily* mapped at 0xfffff000, with the instruction + * at 0xfffffffc being a branch to earlier in the same page. + * This code's job is to set up the MMU using parameters provided + * at the beginning of the page and clean up the temporary mapping. + * + * Pieces of this code are also used for UP kernel, but in this case + * the extra alignment restrictions are dropped via the preprocessor. + */ + bl 1f /* Target of reset vector at end of page. */ +#ifdef __powerpc64__ + nop /* PPC64 alignment word. */ +#endif .globl bp_trace +bp_var_base: bp_trace: - .long 0 + ADDR(0) /* Trace pointer (%r31). */ .globl bp_kernload bp_kernload: - .long 0 + ADDR(0) /* Kern phys. load address. */ /* * Initial configuration @@ -480,27 +501,16 @@ bp_kernload: isync /* Retrieve kernel load [physical] address from bp_kernload */ + bl 5f +5: + mflr %r3 #ifdef __powerpc64__ - b 0f - .align 3 -0: - nop -#endif - bl 5f - ADDR(bp_kernload) - ADDR(__boot_page) -5: mflr %r3 -#ifdef __powerpc64__ - ld %r4, 0(%r3) - ld %r5, 8(%r3) - clrrdi %r3, %r3, 12 + clrrdi %r3, %r3, PAGE_SHIFT /* trunc_page(%r3) */ + ld %r3, (bp_kernload - bp_var_base)(%r3) #else - lwz %r4, 0(%r3) - lwz %r5, 4(%r3) - rlwinm %r3, %r3, 0, 0, 19 + clrrwi %r3, %r3, PAGE_SHIFT /* trunc_page(%r3) */ + lwz %r3, (bp_kernload - bp_var_base)(%r3) #endif - sub %r4, %r4, %r5 /* offset of bp_kernload within __boot_page */ - lwzx %r3, %r4, %r3 /* Set RPN and protection */ ori %r3, %r3, (MAS3_SX | MAS3_SW | MAS3_SR)@l @@ -777,6 +787,11 @@ __boot_page_padding: */ .space 4092 - (__boot_page_padding - __boot_page) b __boot_page + /* + * This is the end of the boot page. + * During AP startup, the previous instruction is at 0xfffffffc + * virtual (i.e. the reset vector.) + */ #endif /* SMP */ /************************************************************************/ diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c index 40ea63c7852..4f47a0b395d 100644 --- a/sys/powerpc/booke/pmap.c +++ b/sys/powerpc/booke/pmap.c @@ -1,3 +1,4 @@ +#define DEBUG /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * @@ -1552,6 +1553,7 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_offset_t kernelend) vm_offset_t kernel_ptbl_root; debugf("mmu_booke_bootstrap: entered\n"); + debugf("mmu: %p start 0x%lx end 0x%lx\n", mmu, start, kernelend); /* Set interesting system properties */ #ifdef __powerpc64__ @@ -1575,6 +1577,7 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_offset_t kernelend) * kernsize is the size of the kernel that is actually mapped. */ data_start = round_page(kernelend); +debugf("NOTE: data_start: %lx\n", data_start); data_end = data_start; /* Allocate the dynamic per-cpu area. */ @@ -1618,7 +1621,9 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_offset_t kernelend) kernel_pdir, data_end); debugf(" data_end: 0x%"PRI0ptrX"\n", data_end); +debugf("kernstart %lx kernsize %lx\n", kernstart, kernsize); if (data_end - kernstart > kernsize) { +debugf("data_end - kernstart > kernsize trigger\n"); kernsize += tlb1_mapin_region(kernstart + kernsize, kernload + kernsize, (data_end - kernstart) - kernsize); } @@ -1863,6 +1868,8 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_offset_t kernelend) virtual_avail += KSTACK_GUARD_PAGES * PAGE_SIZE + kstack0_sz; for (i = 0; i < kstack_pages; i++) { + debugf("kstack page %d %lx %lx\n", i, kstack0, kstack0_phys); +/* XXX CRASH IS HERE */ mmu_booke_kenter(mmu, kstack0, kstack0_phys); kstack0 += PAGE_SIZE; kstack0_phys += PAGE_SIZE; @@ -2082,20 +2089,25 @@ mmu_booke_kenter_attr(mmu_t mmu, vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) if (PTE_ISVALID(pte)) { CTR1(KTR_PMAP, "%s: replacing entry!", __func__); +debugf("tlb0_flush_entry(%lx)\n", va); /* Flush entry from TLB0 */ tlb0_flush_entry(va); } +debugf("pte %p: pa %lx flags %x\n", pte, pa, flags); *pte = PTE_RPN_FROM_PA(pa) | flags; +powerpc_lwsync(); //debugf("mmu_booke_kenter: pdir_idx = %d ptbl_idx = %d va=0x%08x " // "pa=0x%08x rpn=0x%08x flags=0x%08x\n", // pdir_idx, ptbl_idx, va, pa, pte->rpn, pte->flags); /* Flush the real memory from the instruction cache. */ - if ((flags & (PTE_I | PTE_G)) == 0) + if ((flags & (PTE_I | PTE_G)) == 0) { +debugf("about to syncicache for va %lx\n", va); __syncicache((void *)va, PAGE_SIZE); + } tlb_miss_unlock(); mtx_unlock_spin(&tlbivax_mutex); @@ -3902,6 +3914,7 @@ int tlb1_set_entry(vm_offset_t va, vm_paddr_t pa, vm_size_t size, uint32_t flags) { +printf("tlb1_set_entry(%lx,%lx,%lx,%x)\n", va, pa, size, flags); tlb_entry_t e; uint32_t ts, tid; int tsize, index; @@ -3913,6 +3926,7 @@ tlb1_set_entry(vm_offset_t va, vm_paddr_t pa, vm_size_t size, /* Check if we're just updating the flags, and update them. */ if (e.phys == pa && e.virt == va && e.size == size) { e.mas2 = (va & MAS2_EPN_MASK) | flags; +printf("flags updated for index %d\n", index); tlb1_write_entry(&e, index); return (0); } @@ -3960,6 +3974,7 @@ tlb1_set_entry(vm_offset_t va, vm_paddr_t pa, vm_size_t size, vm_size_t tlb1_mapin_region(vm_offset_t va, vm_paddr_t pa, vm_size_t size) { +printf("tlb1_mapin_region(%lx, %lx, %lx)\n", va, pa, size); vm_size_t pgs[KERNEL_REGION_MAX_TLB_ENTRIES]; vm_size_t mapped, pgsz, base, mask; int idx, nents; diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S index 1b91503b5a3..499c82d9aff 100644 --- a/sys/powerpc/booke/trap_subr.S +++ b/sys/powerpc/booke/trap_subr.S @@ -375,9 +375,9 @@ rlwinm outr, inr, 6, 23, 25; /* 4 x TLBSAVE_LEN */ #endif #define TLB_PROLOG \ - mtsprg4 %r1; /* Save SP */ \ - mtsprg5 %r28; \ - mtsprg6 %r29; \ + mtspr SPR_SPRG4, %r1; /* Save SP */ \ + mtspr SPR_SPRG5, %r28; \ + mtspr SPR_SPRG6, %r29; \ /* calculate TLB nesting level and TLBSAVE instance address */ \ GET_CPUINFO(%r1); /* Per-cpu structure */ \ LOAD %r28, PC_BOOKE_TLB_LEVEL(%r1); \ @@ -388,8 +388,8 @@ add %r1, %r1, %r29; /* current TLBSAVE ptr */ \ \ /* save R20-31 */ \ - mfsprg5 %r28; \ - mfsprg6 %r29; \ + mfspr %r28, SPR_SPRG5; \ + mfspr %r29, SPR_SPRG6; \ TLB_SAVE_REGS(%r1); \ /* save LR, CR */ \ mflr %r30; \ @@ -402,7 +402,7 @@ STORE %r30, (TLBSAVE_BOOKE_SRR0)(%r1); /* save SRR0 */ \ STORE %r31, (TLBSAVE_BOOKE_SRR1)(%r1); /* save SRR1 */ \ isync; \ - mfsprg4 %r1 + mfspr %r1, SPR_SPRG4 /* * restores LR, CR, SRR0-1, R20-31 from the TLBSAVE area @@ -410,7 +410,7 @@ * same notes as for the TLB_PROLOG */ #define TLB_RESTORE \ - mtsprg4 %r1; /* Save SP */ \ + mtspr SPR_SPRG4, %r1; /* Save SP */ \ GET_CPUINFO(%r1); /* Per-cpu structure */ \ /* calculate TLB nesting level and TLBSAVE instance addr */ \ LOAD %r28, PC_BOOKE_TLB_LEVEL(%r1); \ @@ -432,7 +432,7 @@ mtsrr1 %r31; \ /* restore R20-31 */ \ TLB_RESTORE_REGS(%r1); \ - mfsprg4 %r1 + mfspr %r1, SPR_SPRG4 #ifdef SMP #define TLB_LOCK \ diff --git a/sys/powerpc/conf/QORIQ64 b/sys/powerpc/conf/QORIQ64 index 1661829a6d2..0ba9c1dde85 100644 --- a/sys/powerpc/conf/QORIQ64 +++ b/sys/powerpc/conf/QORIQ64 @@ -18,6 +18,8 @@ makeoptions WERROR="-Werror -Wno-format -Wno-redundant-decls" options FPU_EMU +options VERBOSE_SYSINIT + options _KPOSIX_PRIORITY_SCHEDULING options ALT_BREAK_TO_DEBUGGER options BREAK_TO_DEBUGGER diff --git a/sys/powerpc/conf/dpaa/config.dpaa b/sys/powerpc/conf/dpaa/config.dpaa index 64f3968a355..b42619713c6 100644 --- a/sys/powerpc/conf/dpaa/config.dpaa +++ b/sys/powerpc/conf/dpaa/config.dpaa @@ -6,6 +6,11 @@ makeoptions DPAA_COMPILE_CMD="${LINUXKPI_C} \ -Wno-cast-qual -Wno-unused-function -Wno-init-self -fms-extensions \ -include $S/contrib/ncsw/build/dflags.h \ -Wno-error=missing-prototypes \ + -Wno-error=parentheses-equality \ + -Wno-error=self-assign \ + -Wno-error=incompatible-pointer-types-discards-qualifiers \ + -Wno-error=non-literal-null-conversion \ + -Wno-error=enum-conversion \ -I$S/contrib/ncsw/build/ \ -I$S/contrib/ncsw/inc \ -I$S/contrib/ncsw/inc/cores \ diff --git a/sys/powerpc/mpc85xx/platform_mpc85xx.c b/sys/powerpc/mpc85xx/platform_mpc85xx.c index c1181e87ed8..81236490325 100644 --- a/sys/powerpc/mpc85xx/platform_mpc85xx.c +++ b/sys/powerpc/mpc85xx/platform_mpc85xx.c @@ -68,7 +68,7 @@ __FBSDID("$FreeBSD$"); extern void *ap_pcpu; extern vm_paddr_t kernload; /* Kernel physical load address */ extern uint8_t __boot_page[]; /* Boot page body */ -extern uint32_t bp_kernload; +extern vm_paddr_t bp_kernload; extern vm_offset_t __startkernel; struct cpu_release { diff --git a/sys/powerpc/powerpc/machdep.c b/sys/powerpc/powerpc/machdep.c index 039c527bffa..c91c05a3926 100644 --- a/sys/powerpc/powerpc/machdep.c +++ b/sys/powerpc/powerpc/machdep.c @@ -337,7 +337,9 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp, init_static_kenv(init_kenv, sizeof(init_kenv)); ofw_bootargs = true; } +#if 0 link_elf_ireloc(kmdp); +#endif /* Store boot environment state */ OF_initial_setup((void *)fdt, NULL, (int (*)(void *))ofentry); diff --git a/sys/powerpc/powerpc/syncicache.c b/sys/powerpc/powerpc/syncicache.c index 15ac490798d..10cbc0d4d4d 100644 --- a/sys/powerpc/powerpc/syncicache.c +++ b/sys/powerpc/powerpc/syncicache.c @@ -50,23 +50,29 @@ __FBSDID("$FreeBSD$"); void __syncicache(void *from, int len) { +printf("syncicache(%p, %d)\n", from, len); + int doit = (len == 4096); register_t l, off; - char *p; + volatile char *p; off = (uintptr_t)from & (cacheline_size - 1); l = len += off; p = (char *)from - off; do { + if (doit) printf("__syncicache: dcbst 0,[%p]\n", p); __asm __volatile ("dcbst 0,%0" :: "r"(p)); p += cacheline_size; } while ((l -= cacheline_size) > 0); + if (doit) printf("__syncicache: sync\n"); __asm __volatile ("sync"); p = (char *)from - off; do { + if (doit) printf("icbi 0,[%p]\n", p); __asm __volatile ("icbi 0,%0" :: "r"(p)); p += cacheline_size; } while ((len -= cacheline_size) > 0); + if (doit) printf("__syncicache: sync; isync\n"); __asm __volatile ("sync; isync"); }