--- /tmp/left.dis 2019-10-14 22:16:21.863929000 -0500 +++ /tmp/right.dis 2019-10-14 22:16:29.245248000 -0500 @@ -1,5 +1,5 @@ -/tmp/thr_setschedparam.o: file format elf64-powerpc-freebsd +/tmp/thr_setschedparam.o.1: file format elf64-powerpc-freebsd Disassembly of section .text: @@ -12,10 +12,10 @@ Disassembly of section .text: 14: f8 21 ff b1 stdu r1,-80(r1) 18: 7c 3f 0b 78 mr r31,r1 1c: fb 5f 00 20 std r26,32(r31) - 20: fb 7f 00 28 std r27,40(r31) - 24: 7c 9b 23 78 mr r27,r4 - 28: fb 9f 00 30 std r28,48(r31) - 2c: 7c bc 2b 78 mr r28,r5 + 20: 7c 9a 23 78 mr r26,r4 + 24: fb 7f 00 28 std r27,40(r31) + 28: 7c bb 2b 78 mr r27,r5 + 2c: fb 9f 00 30 std r28,48(r31) 30: fb bf 00 38 std r29,56(r31) 34: 7c 7d 1b 78 mr r29,r3 38: fb df 00 40 std r30,64(r31) @@ -33,9 +33,9 @@ Disassembly of section .text: 68: 7f a4 eb 78 mr r4,r29 6c: 38 a0 00 00 li r5,0 70: 48 00 00 01 bl 70 <_pthread_setschedparam+0x70> - 74: 7c 7a 1b 78 mr r26,r3 - 78: 28 1a 00 00 cmplwi r26,0 - 7c: 40 82 02 f4 bne- 370 <_pthread_setschedparam+0x370> + 74: 7c 7c 1b 78 mr r28,r3 + 78: 28 1c 00 00 cmplwi r28,0 + 7c: 40 82 02 c8 bne- 344 <_pthread_setschedparam+0x344> 80: 48 00 00 d0 b 150 <_pthread_setschedparam+0x150> 84: 3b c0 00 00 li r30,0 88: 7c 3e e8 40 cmpld r30,r29 @@ -84,25 +84,25 @@ Disassembly of section .text: 134: 60 a7 00 11 ori r7,r5,17 138: 38 e7 ff ff addi r7,r7,-1 13c: 7c 06 38 40 cmplw r6,r7 - 140: 41 82 02 5c beq- 39c <_pthread_setschedparam+0x39c> + 140: 41 82 02 30 beq- 370 <_pthread_setschedparam+0x370> 144: 80 a3 00 00 lwz r5,0(r3) 148: 78 84 00 20 clrldi r4,r4,32 14c: 48 00 00 01 bl 14c <_pthread_setschedparam+0x14c> 150: 80 7d 00 90 lwz r3,144(r29) - 154: 7c 03 d8 40 cmplw r3,r27 + 154: 7c 03 d0 40 cmplw r3,r26 158: 40 82 00 94 bne- 1ec <_pthread_setschedparam+0x1ec> - 15c: 28 1b 00 02 cmplwi r27,2 + 15c: 28 1a 00 02 cmplwi r26,2 160: 40 82 00 0c bne- 16c <_pthread_setschedparam+0x16c> - 164: 80 7c 00 00 lwz r3,0(r28) + 164: 80 7b 00 00 lwz r3,0(r27) 168: 48 00 00 14 b 17c <_pthread_setschedparam+0x17c> 16c: 80 7d 00 98 lwz r3,152(r29) - 170: 80 9c 00 00 lwz r4,0(r28) + 170: 80 9b 00 00 lwz r4,0(r27) 174: 7c 03 20 40 cmplw r3,r4 178: 40 82 00 74 bne- 1ec <_pthread_setschedparam+0x1ec> 17c: 80 9e 00 2c lwz r4,44(r30) 180: 2c 04 00 00 cmpwi r4,0 184: 90 7d 00 98 stw r3,152(r29) - 188: 40 c1 02 50 ble- 3d8 <_pthread_setschedparam+0x3d8> + 188: 40 c1 02 24 ble- 3ac <_pthread_setschedparam+0x3ac> 18c: 80 bd 00 0c lwz r5,12(r29) 190: 3c 60 80 00 lis r3,-32768 194: 60 66 00 11 ori r6,r3,17 @@ -112,38 +112,38 @@ Disassembly of section .text: 1a4: 7c 67 fe 70 srawi r7,r3,31 1a8: 38 7d 00 08 addi r3,r29,8 1ac: 7c e6 30 38 and r6,r7,r6 - 1b0: 41 82 01 50 beq- 300 <_pthread_setschedparam+0x300> + 1b0: 41 82 01 24 beq- 2d4 <_pthread_setschedparam+0x2d4> 1b4: 7c 20 04 ac lwsync - 1b8: 7c a0 18 28 lwarx r5,0,r3 - 1bc: 7c 04 28 40 cmplw r4,r5 - 1c0: 40 82 00 14 bne- 1d4 <_pthread_setschedparam+0x1d4> - 1c4: 7c c0 19 2d stwcx. r6,0,r3 - 1c8: 40 c2 ff f0 bne+ 1b8 <_pthread_setschedparam+0x1b8> - 1cc: 38 a0 00 01 li r5,1 - 1d0: 48 00 00 0c b 1dc <_pthread_setschedparam+0x1dc> - 1d4: 7c a0 19 2d stwcx. r5,0,r3 - 1d8: 38 a0 00 00 li r5,0 - 1dc: 28 05 00 00 cmplwi r5,0 - 1e0: 40 82 01 78 bne- 358 <_pthread_setschedparam+0x358> - 1e4: 48 00 00 01 bl 1e4 <_pthread_setschedparam+0x1e4> - 1e8: 48 00 01 70 b 358 <_pthread_setschedparam+0x358> + 1b8: 3b 80 00 00 li r28,0 + 1bc: 7c a0 18 28 lwarx r5,0,r3 + 1c0: 7c 04 28 40 cmplw r4,r5 + 1c4: 40 82 00 14 bne- 1d8 <_pthread_setschedparam+0x1d8> + 1c8: 7c c0 19 2d stwcx. r6,0,r3 + 1cc: 40 c2 ff f0 bne+ 1bc <_pthread_setschedparam+0x1bc> + 1d0: 38 a0 00 01 li r5,1 + 1d4: 48 00 00 0c b 1e0 <_pthread_setschedparam+0x1e0> + 1d8: 7c a0 19 2d stwcx. r5,0,r3 + 1dc: 38 a0 00 00 li r5,0 + 1e0: 28 05 00 00 cmplwi r5,0 + 1e4: 40 82 01 4c bne- 330 <_pthread_setschedparam+0x330> + 1e8: 48 00 00 a0 b 288 <_pthread_setschedparam+0x288> 1ec: e8 7d 00 06 lwa r3,4(r29) - 1f0: 7f 64 07 b4 extsw r4,r27 - 1f4: 7f 85 e3 78 mr r5,r28 + 1f0: 7f 44 07 b4 extsw r4,r26 + 1f4: 7f 65 db 78 mr r5,r27 1f8: 48 00 00 01 bl 1f8 <_pthread_setschedparam+0x1f8> - 1fc: 7c 7a 1b 78 mr r26,r3 - 200: 2c 1a ff ff cmpwi r26,-1 + 1fc: 7c 7c 1b 78 mr r28,r3 + 200: 2c 1c ff ff cmpwi r28,-1 204: 41 82 00 14 beq- 218 <_pthread_setschedparam+0x218> - 208: 93 7d 00 90 stw r27,144(r29) - 20c: 80 7c 00 00 lwz r3,0(r28) + 208: 93 5d 00 90 stw r26,144(r29) + 20c: 80 7b 00 00 lwz r3,0(r27) 210: 90 7d 00 98 stw r3,152(r29) 214: 48 00 00 10 b 224 <_pthread_setschedparam+0x224> 218: 48 00 00 01 bl 218 <_pthread_setschedparam+0x218> 21c: 60 00 00 00 nop - 220: 83 43 00 00 lwz r26,0(r3) + 220: 83 83 00 00 lwz r28,0(r3) 224: 80 7e 00 2c lwz r3,44(r30) 228: 2c 03 00 00 cmpwi r3,0 - 22c: 40 c1 01 ac ble- 3d8 <_pthread_setschedparam+0x3d8> + 22c: 40 c1 01 80 ble- 3ac <_pthread_setschedparam+0x3ac> 230: 80 bd 00 0c lwz r5,12(r29) 234: 3c 60 80 00 lis r3,-32768 238: 60 66 00 11 ori r6,r3,17 @@ -165,13 +165,13 @@ Disassembly of section .text: 278: 7c a0 19 2d stwcx. r5,0,r3 27c: 38 a0 00 00 li r5,0 280: 28 05 00 00 cmplwi r5,0 - 284: 40 82 00 64 bne- 2e8 <_pthread_setschedparam+0x2e8> + 284: 40 82 00 ac bne- 330 <_pthread_setschedparam+0x330> 288: 48 00 00 01 bl 288 <_pthread_setschedparam+0x288> - 28c: 48 00 00 5c b 2e8 <_pthread_setschedparam+0x2e8> + 28c: 48 00 00 a4 b 330 <_pthread_setschedparam+0x330> 290: 80 e3 00 00 lwz r7,0(r3) 294: 54 e8 00 7e clrlwi r8,r7,1 298: 7c 08 20 40 cmplw r8,r4 - 29c: 40 82 00 4c bne- 2e8 <_pthread_setschedparam+0x2e8> + 29c: 40 82 00 94 bne- 330 <_pthread_setschedparam+0x330> 2a0: 7c 20 04 ac lwsync 2a4: 7d 00 18 28 lwarx r8,0,r3 2a8: 7c 07 40 40 cmplw r7,r8 @@ -183,72 +183,61 @@ Disassembly of section .text: 2c0: 7d 00 19 2d stwcx. r8,0,r3 2c4: 39 00 00 00 li r8,0 2c8: 28 08 00 00 cmplwi r8,0 - 2cc: 41 82 ff c4 beq+ 290 <_pthread_setschedparam+0x290> - 2d0: 2c 07 ff ff cmpwi r7,-1 - 2d4: 41 81 00 14 bgt- 2e8 <_pthread_setschedparam+0x2e8> - 2d8: 38 80 00 16 li r4,22 - 2dc: 38 c0 00 00 li r6,0 - 2e0: 38 e0 00 00 li r7,0 - 2e4: 48 00 00 01 bl 2e4 <_pthread_setschedparam+0x2e4> - 2e8: 80 7e 00 2c lwz r3,44(r30) - 2ec: 38 63 ff ff addi r3,r3,-1 - 2f0: 90 7e 00 2c stw r3,44(r30) - 2f4: 7f c3 f3 78 mr r3,r30 - 2f8: 48 00 00 01 bl 2f8 <_pthread_setschedparam+0x2f8> - 2fc: 48 00 00 74 b 370 <_pthread_setschedparam+0x370> - 300: 80 e3 00 00 lwz r7,0(r3) - 304: 54 e8 00 7e clrlwi r8,r7,1 - 308: 7c 08 20 40 cmplw r8,r4 - 30c: 40 82 00 4c bne- 358 <_pthread_setschedparam+0x358> - 310: 7c 20 04 ac lwsync - 314: 7d 00 18 28 lwarx r8,0,r3 - 318: 7c 07 40 40 cmplw r7,r8 - 31c: 40 82 00 14 bne- 330 <_pthread_setschedparam+0x330> - 320: 7c c0 19 2d stwcx. r6,0,r3 - 324: 40 c2 ff f0 bne+ 314 <_pthread_setschedparam+0x314> - 328: 39 00 00 01 li r8,1 - 32c: 48 00 00 0c b 338 <_pthread_setschedparam+0x338> - 330: 7d 00 19 2d stwcx. r8,0,r3 - 334: 39 00 00 00 li r8,0 - 338: 28 08 00 00 cmplwi r8,0 - 33c: 41 82 ff c4 beq+ 300 <_pthread_setschedparam+0x300> - 340: 2c 07 ff ff cmpwi r7,-1 - 344: 41 81 00 14 bgt- 358 <_pthread_setschedparam+0x358> - 348: 38 80 00 16 li r4,22 - 34c: 38 c0 00 00 li r6,0 - 350: 38 e0 00 00 li r7,0 - 354: 48 00 00 01 bl 354 <_pthread_setschedparam+0x354> - 358: 80 7e 00 2c lwz r3,44(r30) - 35c: 38 63 ff ff addi r3,r3,-1 - 360: 90 7e 00 2c stw r3,44(r30) - 364: 7f c3 f3 78 mr r3,r30 - 368: 48 00 00 01 bl 368 <_pthread_setschedparam+0x368> - 36c: 3b 40 00 00 li r26,0 - 370: 7f 43 07 b4 extsw r3,r26 - 374: eb df 00 40 ld r30,64(r31) - 378: eb bf 00 38 ld r29,56(r31) - 37c: eb 9f 00 30 ld r28,48(r31) - 380: eb 7f 00 28 ld r27,40(r31) - 384: eb 5f 00 20 ld r26,32(r31) - 388: 38 21 00 50 addi r1,r1,80 - 38c: e8 01 00 10 ld r0,16(r1) - 390: eb e1 ff f8 ld r31,-8(r1) - 394: 7c 08 03 a6 mtlr r0 - 398: 4e 80 00 20 blr - 39c: 64 86 80 00 oris r6,r4,32768 - 3a0: 60 a5 00 10 ori r5,r5,16 - 3a4: 7c e0 18 28 lwarx r7,0,r3 - 3a8: 7c 05 38 40 cmplw r5,r7 - 3ac: 40 82 00 14 bne- 3c0 <_pthread_setschedparam+0x3c0> - 3b0: 7c c0 19 2d stwcx. r6,0,r3 - 3b4: 40 c2 ff f0 bne+ 3a4 <_pthread_setschedparam+0x3a4> - 3b8: 38 e0 00 01 li r7,1 - 3bc: 48 00 00 0c b 3c8 <_pthread_setschedparam+0x3c8> - 3c0: 7c e0 19 2d stwcx. r7,0,r3 - 3c4: 38 e0 00 00 li r7,0 - 3c8: 4c 00 01 2c isync - 3cc: 28 07 00 00 cmplwi r7,0 - 3d0: 40 82 fd 78 bne+ 148 <_pthread_setschedparam+0x148> - 3d4: 4b ff fd 70 b 144 <_pthread_setschedparam+0x144> - 3d8: 48 00 00 01 bl 3d8 <_pthread_setschedparam+0x3d8> + 2cc: 40 82 00 4c bne- 318 <_pthread_setschedparam+0x318> + 2d0: 4b ff ff c0 b 290 <_pthread_setschedparam+0x290> + 2d4: 80 e3 00 00 lwz r7,0(r3) + 2d8: 3b 80 00 00 li r28,0 + 2dc: 54 e8 00 7e clrlwi r8,r7,1 + 2e0: 7c 08 20 40 cmplw r8,r4 + 2e4: 40 82 00 4c bne- 330 <_pthread_setschedparam+0x330> + 2e8: 7c 20 04 ac lwsync + 2ec: 7d 00 18 28 lwarx r8,0,r3 + 2f0: 7c 07 40 40 cmplw r7,r8 + 2f4: 40 82 00 14 bne- 308 <_pthread_setschedparam+0x308> + 2f8: 7c c0 19 2d stwcx. r6,0,r3 + 2fc: 40 c2 ff f0 bne+ 2ec <_pthread_setschedparam+0x2ec> + 300: 39 00 00 01 li r8,1 + 304: 48 00 00 0c b 310 <_pthread_setschedparam+0x310> + 308: 7d 00 19 2d stwcx. r8,0,r3 + 30c: 39 00 00 00 li r8,0 + 310: 28 08 00 00 cmplwi r8,0 + 314: 41 82 ff c0 beq+ 2d4 <_pthread_setschedparam+0x2d4> + 318: 2c 07 ff ff cmpwi r7,-1 + 31c: 41 81 00 14 bgt- 330 <_pthread_setschedparam+0x330> + 320: 38 80 00 16 li r4,22 + 324: 38 c0 00 00 li r6,0 + 328: 38 e0 00 00 li r7,0 + 32c: 48 00 00 01 bl 32c <_pthread_setschedparam+0x32c> + 330: 80 7e 00 2c lwz r3,44(r30) + 334: 38 63 ff ff addi r3,r3,-1 + 338: 90 7e 00 2c stw r3,44(r30) + 33c: 7f c3 f3 78 mr r3,r30 + 340: 48 00 00 01 bl 340 <_pthread_setschedparam+0x340> + 344: 7f 83 07 b4 extsw r3,r28 + 348: eb df 00 40 ld r30,64(r31) + 34c: eb bf 00 38 ld r29,56(r31) + 350: eb 9f 00 30 ld r28,48(r31) + 354: eb 7f 00 28 ld r27,40(r31) + 358: eb 5f 00 20 ld r26,32(r31) + 35c: 38 21 00 50 addi r1,r1,80 + 360: e8 01 00 10 ld r0,16(r1) + 364: eb e1 ff f8 ld r31,-8(r1) + 368: 7c 08 03 a6 mtlr r0 + 36c: 4e 80 00 20 blr + 370: 64 86 80 00 oris r6,r4,32768 + 374: 60 a5 00 10 ori r5,r5,16 + 378: 7c e0 18 28 lwarx r7,0,r3 + 37c: 7c 05 38 40 cmplw r5,r7 + 380: 40 82 00 14 bne- 394 <_pthread_setschedparam+0x394> + 384: 7c c0 19 2d stwcx. r6,0,r3 + 388: 40 c2 ff f0 bne+ 378 <_pthread_setschedparam+0x378> + 38c: 38 e0 00 01 li r7,1 + 390: 48 00 00 0c b 39c <_pthread_setschedparam+0x39c> + 394: 7c e0 19 2d stwcx. r7,0,r3 + 398: 38 e0 00 00 li r7,0 + 39c: 4c 00 01 2c isync + 3a0: 28 07 00 00 cmplwi r7,0 + 3a4: 40 82 fd a4 bne+ 148 <_pthread_setschedparam+0x148> + 3a8: 4b ff fd 9c b 144 <_pthread_setschedparam+0x144> + 3ac: 48 00 00 01 bl 3ac <_pthread_setschedparam+0x3ac> ...