diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c
index b840440c5c1..3e5e91d23ca 100644
--- a/sys/powerpc/aim/mmu_radix.c
+++ b/sys/powerpc/aim/mmu_radix.c
@@ -409,6 +409,19 @@ extern void bs_remap_earlyboot(void);
 #define PARTTAB_HR		(1UL << 63) /* host uses radix */
 #define PARTTAB_GR		(1UL << 63) /* guest uses radix must match host */
 
+/* Partition table */
+#define PATB_SHIFT		12
+#define PATB_MASK		0x0FFFFFFFFFFFF000
+#define PATB(x) (DMAP_TO_PHYS(x) & PATB_MASK)
+/* 4k partition table */
+#define PATS			0
+
+/* Page directory */
+#define RPDB_SHIFT		8
+#define RPDB_MASK		0x0FFFFFFFFFFFFF00
+#define RPDB(x) (DMAP_TO_PHYS(x) & RPDB_MASK)
+
+
 /* TLB flush actions. Used as argument to tlbiel_all() */
 enum {
 	TLB_INVAL_SCOPE_LPID = 0,	/* invalidate TLBs for current LPID */
@@ -1856,6 +1869,7 @@ mmu_radix_late_bootstrap(vm_offset_t start, vm_offset_t end)
 		pa += PAGE_SIZE;
 		va += PAGE_SIZE;
 	}
+	__asm __volatile("eieio; tlbsync; ptesync" ::: "memory");
 	thread0.td_kstack_pages = kstack_pages;
 	printf("%s set kstack\n", __func__);
 
@@ -1881,14 +1895,12 @@ mmu_parttab_init(void)
 	isa3_parttab = (struct pate *)PHYS_TO_DMAP(parttab_phys);
 
 	printf("%s parttab: %p\n", __func__, isa3_parttab);
-	ptcr = parttab_phys | (PARTTAB_SIZE_SHIFT-12);
+	ptcr = PATB(parttab_phys) | PATS;
 	printf("setting ptcr %lx\n", ptcr);
 	mtspr(SPR_PTCR, ptcr);
-#if 0
-	/* functional simulator claims MCE on this */
+
 	powernv_set_nmmu_ptcr(ptcr);
 	printf("set nested mmu ptcr\n");
-#endif	
 }
 
 static void
@@ -1921,7 +1933,7 @@ mmu_radix_parttab_init(void)
 
 	mmu_parttab_init();
 	printf("%s construct pagetab\n", __func__);
-	pagetab = RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) | \
+	pagetab = RTS_SIZE | RPDB((vm_offset_t)kernel_pmap->pm_pml1) | \
 		         RADIX_PGD_INDEX_SHIFT | PARTTAB_HR;
 	printf("%s install pagetab %lx\n", __func__, pagetab);
 	mmu_parttab_update(0, pagetab, 0);
@@ -1945,7 +1957,7 @@ mmu_radix_proctab_init(void)
 	isa3_base_pid = 1;
 
 	isa3_proctab = (void*)PHYS_TO_DMAP(proctab0pa);
-	isa3_proctab->proctab0 = htobe64(RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) | \
+	isa3_proctab->proctab0 = htobe64(RTS_SIZE | RPDB((vm_offset_t)kernel_pmap->pm_pml1) | \
 									 RADIX_PGD_INDEX_SHIFT);
 
 	mmu_radix_proctab_register(proctab0pa, PROCTAB_SIZE_SHIFT - 12);
@@ -3901,7 +3913,6 @@ static inline int
 mmu_radix_pmap_pinit(pmap_t pmap)
 {
 	vmem_addr_t pid;
-	vm_paddr_t l1pa;
 	int error;
 
 	CTR2(KTR_PMAP, "%s(%p)", __func__, pmap);
@@ -3924,8 +3935,7 @@ mmu_radix_pmap_pinit(pmap_t pmap)
 	}
 
 	pmap->pm_pid = pid;
-	l1pa = DMAP_TO_PHYS((vm_offset_t)pmap->pm_pml1);
-	isa3_proctab[pid].proctab0 = htobe64(RTS_SIZE |  l1pa | RADIX_PGD_INDEX_SHIFT);
+	isa3_proctab[pid].proctab0 = htobe64(RTS_SIZE | RPDB((vm_offset_t)pmap->pm_pml1) | RADIX_PGD_INDEX_SHIFT);
 	__asm __volatile("ptesync;isync" : : : "memory");
 	return (1);
 }