diff --git a/sys/conf/files.riscv b/sys/conf/files.riscv
index 7ecea016b9a3..43acbe76e088 100644
--- a/sys/conf/files.riscv
+++ b/sys/conf/files.riscv
@@ -3,6 +3,10 @@ cddl/dev/dtrace/riscv/dtrace_asm.S			optional dtrace compile-with "${DTRACE_S}"
 cddl/dev/dtrace/riscv/dtrace_subr.c			optional dtrace compile-with "${DTRACE_C}"
 cddl/dev/fbt/riscv/fbt_isa.c				optional dtrace_fbt | dtraceall compile-with "${FBT_C}"
 crypto/des/des_enc.c		optional	netsmb
+dev/dwc/if_dwc.c		optional	dwc
+dev/dwc/if_dwc_if.m		optional	dwc
+dev/mmc/host/dwmmc.c		optional	dwmmc fdt
+dev/mmc/host/dwmmc_starfive.c	optional	dwmmc fdt
 dev/ofw/ofw_cpu.c		optional	fdt
 dev/ofw/ofwpci.c		optional 	pci fdt
 dev/pci/pci_host_generic.c	optional	pci
diff --git a/sys/dev/mmc/host/dwmmc_starfive.c b/sys/dev/mmc/host/dwmmc_starfive.c
new file mode 100644
index 000000000000..bc0c3263a174
--- /dev/null
+++ b/sys/dev/mmc/host/dwmmc_starfive.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2015 Andrew Turner.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+#include <sys/queue.h>
+#include <sys/taskqueue.h>
+
+#include <machine/bus.h>
+
+#include <dev/mmc/bridge.h>
+#include <dev/mmc/mmc_fdt_helpers.h>
+
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/mmc/host/dwmmc_var.h>
+
+#include "opt_mmccam.h"
+
+static device_probe_t starfive_dwmmc_probe;
+static device_attach_t starfive_dwmmc_attach;
+
+static int
+starfive_dwmmc_probe(device_t dev)
+{
+	phandle_t root;
+
+	if (!ofw_bus_status_okay(dev))
+		return (ENXIO);
+
+	/* Uncustomized Synopsys string. We check the vendor below. */
+	if (!ofw_bus_is_compatible(dev, "snps,dw-mshc"))
+		return (ENXIO);
+
+	root = OF_finddevice("/");
+
+	/* Verify that we're on a known board. */
+	if (!ofw_bus_node_is_compatible(root, "sifive,freedom-u74-arty")) {
+		return (ENXIO);
+	}
+
+	device_set_desc(dev, "Synopsys DesignWare Mobile "
+	    "Storage Host Controller (StarFive or uncustomized)");
+
+	return (BUS_PROBE_VENDOR);
+}
+
+static int
+starfive_dwmmc_attach(device_t dev)
+{
+	struct dwmmc_softc *sc;
+
+	sc = device_get_softc(dev);
+	sc->hwtype = HWTYPE_STARFIVE;
+	/* TODO: Calculate this from a clock driver */
+	sc->bus_hz = 24000000; /* 24MHz */
+
+	/*
+	 * ARM64TODO: This is likely because we lack support for
+	 * DMA when the controller is not cache-coherent on arm64.
+	 */
+	sc->use_pio = 1;
+
+	return (dwmmc_attach(dev));
+}
+
+static device_method_t starfive_dwmmc_methods[] = {
+	/* bus interface */
+	DEVMETHOD(device_probe, starfive_dwmmc_probe),
+	DEVMETHOD(device_attach, starfive_dwmmc_attach),
+
+	DEVMETHOD_END
+};
+
+static devclass_t starfive_dwmmc_devclass;
+
+DEFINE_CLASS_1(starfive_dwmmc, starfive_dwmmc_driver, starfive_dwmmc_methods,
+    sizeof(struct dwmmc_softc), dwmmc_driver);
+
+DRIVER_MODULE(starfive_dwmmc, simplebus, starfive_dwmmc_driver,
+    starfive_dwmmc_devclass, 0, 0);
+DRIVER_MODULE(starfive_dwmmc, ofwbus, starfive_dwmmc_driver, starfive_dwmmc_devclass
+    , NULL, NULL);
+#ifndef MMCCAM
+MMC_DECLARE_BRIDGE(starfive_dwmmc);
+#endif
diff --git a/sys/dev/mmc/host/dwmmc_var.h b/sys/dev/mmc/host/dwmmc_var.h
index 6c7aae79640d..ee7815c12ede 100644
--- a/sys/dev/mmc/host/dwmmc_var.h
+++ b/sys/dev/mmc/host/dwmmc_var.h
@@ -47,6 +47,7 @@ enum {
 	HWTYPE_EXYNOS,
 	HWTYPE_HISILICON,
 	HWTYPE_ROCKCHIP,
+	HWTYPE_STARFIVE,
 };
 
 struct dwmmc_softc {
diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC
index a04d5557c83c..78084dc03d1a 100644
--- a/sys/riscv/conf/GENERIC
+++ b/sys/riscv/conf/GENERIC
@@ -117,6 +117,7 @@ device		goldfish_rtc	# QEMU RTC
 device		cgem		# Cadence GEM Gigabit Ethernet device
 device		miibus		# MII bus support
 device		xae		# Xilinx AXI Ethernet MAC
+device		dwc		# Synopsys DesignWare GMAC
 
 # DMA support
 device		xdma		# DMA interface
@@ -171,3 +172,6 @@ makeoptions	MODULES_EXTRA+="dtb/sifive"
 # SiFive device drivers
 device		fu540spi
 include		"../sifive/std.sifive"
+
+# StarFive (beaglev) MMC
+device		dwmmc